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Memory

SPI NOR flash, EEPROM, and FRAM: write granularity, protect bits, and boot compatibility.

Written and verified by John Merton · verified 2026-07-10

Memory ICs store data when the power is off. This category covers SPI NOR flash (W25Q32JV, W25Q128JV), the workhorse of firmware storage, and the selection axes that matter: sector size vs erase time, write-protect pin behavior, and the difference between the rated endurance and what your wear-leveling strategy actually delivers.

How to choose

The axes below are the criteria you actually weigh when selecting a part in this category.

Sector/block size vs erase time and write granularity
NOR flash erases in large blocks (4 KB to 64 KB) but writes at byte level. EEPROM erases and writes at byte level but has lower density. Pick based on your write pattern, not just capacity.
See:W25Q32JVW25Q128JV
Write-protect pin behavior and boot compatibility
The WP# and HOLD# pins have default states that can prevent writes or pause SPI transactions. Check whether your MCU's boot ROM expects specific pin states on the flash.
See:W25Q32JVW25Q128JV
Endurance: rated cycles vs your write frequency
NOR flash is rated for 100K cycles per sector. A data logger that writes once per second exhausts a sector in ~28 hours without wear leveling. Design the storage strategy around the endurance rating.
See:W25Q32JVW25Q128JV

All parts in this category

Compare specs

Parts in this guide verified against manufacturer datasheets; latest 2026-07-10.

MPNPackageLifecycleHeadline spec
W25Q32JV8-pin SOIC 150-mil (code SN) / 208-mil (code SS)ActiveCapacity: 32 Mbit (4M x 8), 16,384 programmable pages of 256 bytes
W25Q128JVSOIC-8 208-mil (code S) / SOIC-16 300-mil (code F) / WSON-8 6x5-mm (code P) / WSON-8 8x6-mm (code E) / TFBGA-24 6x8-mm (codes B/C) / WLCSP (code Y)ActiveCapacity: 128 Mbit (16M x 8), 65,536 programmable pages of 256 bytes; 4,096 erasable 4 KB sectors, 256 erasable 64 KB blocks

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