PCBWiki

One rail contract. Two operating models.

LDO vs Buck Converter for a 3.3 V Rail

The load current alone does not choose the topology. Bound VIN, load states, thermal path, noise, idle current, startup, and layout first; then reject the operating model that fails reality.

Updated 2026-07-15

Written and verified by John Merton · verified 2026-07-15

Short answer

Keep the LDO in contention

when worst-case dropout and junction temperature pass with margin, idle current fits, and low ripple or a small power-stage BOM is worth the dissipated power.

Evaluate a buck

when linear headroom or heat fails, or when efficiency materially changes runtime or system temperature—and only after the converter passes its own layout, ripple, startup, and load-state checks.

Compare mechanisms, not marketing labels

“Simple” and “efficient” are pleasant stories. The useful comparison is what each architecture must prove at the same rail corners.

LDO and buck converter decision boundaries for a 3.3 V rail
Decision axisLDO / linear pathBuck pathStop condition
Electrical headroomVIN must remain above 3.3 V plus guaranteed dropout at the actual load and temperature.VIN must remain inside the converter operating range while duty cycle and minimum on-time support the 3.3 V rail.Stop if any source, tolerance, droop, or transient corner crosses the documented regulation boundary.
Heat and efficiencyEstimate load loss as (VIN − 3.3 V) × ILOAD and add VIN × IGND when ground current is material, then evaluate the real thermal path.Use the efficiency curve at the actual VIN, 3.3 V output, load, switching mode, inductor, and temperature rather than an up-to headline.Stop if junction margin, system heat, or runtime depends on an unverified typical efficiency or generic thermal resistance.
Noise and rippleVerify output noise, PSRR over frequency, capacitor stability, transient response, and upstream-noise conditions for the exact part.Budget switching ripple, wideband noise, high-frequency spikes, pulse-skipping behavior, filtering, and coupling into sensitive nodes.Stop if the noise requirement is only described as quiet or noisy instead of a frequency-aware measurement boundary.
Layout and BOMThe power stage is usually smaller, but capacitor rules, copper area, vias, and heat spreading still belong to the electrical design.The inductor, power-loop capacitors, switch node, feedback route, grounding, and manufacturer layout geometry are part of the converter.Stop if a reference schematic was copied without preserving the exact package, components, current loops, and layout constraints.
Light-load and startup behaviorCheck quiescent and shutdown current, enable thresholds, soft-start or inrush behavior, reverse current, and pre-biased output handling.Check PFM or forced-PWM behavior, idle current, pulse skipping, startup into the load, current limit, soft start, and pre-bias behavior.Stop if sleep current, startup, sequencing, or reverse-current paths are absent from the rail contract.

Run the linear loss before debating topology

The table uses load-only loss: (VIN − 3.3 V) × ILOAD. Add ground-current power, VIN × IGND, when it is material. The idealized linear efficiency ceiling is VOUT ÷ VIN; the real result also includes ground current and operating losses.

Linear-regulator load-loss examples for 3.3 V rails
RailLoadLinear load lossIdealized linear efficiency ceiling
3.6 V → 3.3 V100 mA0.03 W91.7%
5 V → 3.3 V100 mA0.17 W66.0%
5 V → 3.3 V500 mA0.85 W66.0%
12 V → 3.3 V100 mA0.87 W27.5%

No buck efficiency is invented here. Read the efficiency curve at the actual operating point—including VIN, 3.3 V output, load, switching mode, inductor, and temperature—then measure the built rail.

Exact in-corpus examples

Bounded LDO example

AP2112K-3.3TRG1 is a current low-dropout example already verified in PCBWiki. Its exact dropout, input ceiling, capacitor, enable, current, and thermal boundaries belong to that orderable—not to “LDOs” as a class.

Bounded buck example

AP63203WU-7 is a fixed 3.3 V synchronous buck already verified in PCBWiki. Its VIN range, load claim, light-load behavior, components, and layout are an exact design lane—not a universal switcher default.

Take the next falsifiable step

Need the broader topology boundary? Start with choosing a voltage regulator.

Testing the linear path? Put the operating point into the thermal and dropout calculator.

Connecting several rails? Propagate the load states through the power-tree rail budget.

Common questions

When should I use an LDO instead of a buck converter for a 3.3 V rail?

Keep an LDO in contention when worst-case dropout and junction temperature pass with margin at your real load, when its idle current fits your budget, and when low output ripple or a smaller power-stage BOM is worth the power it dissipates as heat. If any of those checks fail, evaluate a buck converter instead.

How much power does a linear regulator waste dropping 5 V to 3.3 V?

Using load-only loss of (VIN − 3.3 V) × ILOAD, a 5 V-to-3.3 V linear rail dissipates about 0.17 W at 100 mA and about 0.85 W at 500 mA of load current, with an idealized linear efficiency ceiling of about 66% either way. Add VIN × ground-current power when that term is material, then evaluate the real thermal path.

Are the AP2112K-3.3TRG1 and AP63203WU-7 good defaults for any 3.3 V design?

No—both are bounded, already-verified examples, not universal recommendations. AP2112K-3.3TRG1 is a specific low-dropout LDO whose exact dropout, input ceiling, capacitor, enable, current, and thermal boundaries belong to that orderable. AP63203WU-7 is a specific fixed 3.3 V synchronous buck whose VIN range, load claim, light-load behavior, components, and layout are its own design lane.

What causes buck-converter noise, and is it worse than an LDO's?

A buck converter's noise is not one number—budget switching ripple, wideband noise, high-frequency spikes, pulse-skipping behavior, filtering, and coupling into sensitive nodes separately. An LDO instead needs its output noise, PSRR over frequency, capacitor stability, and transient response verified for the exact part. Either way, stop if your noise requirement is only described as "quiet" instead of a frequency-aware measurement boundary.

Official sources and claim boundaries

Retrieved 2026-07-15. Live sources; archive not captured. Verify current revisions and exact orderables before production use.

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