SN65HVD230 PCB Design Guide: Footprint, Pinout, and Alternatives
3.3 V ISO 11898-2 CAN transceiver with slope control and listen-only standby.
The SN65HVD230 is Texas Instruments' 3.3 V CAN transceiver: the ISO 11898-2 physical layer that sits between a CAN controller's TXD/RXD pins and the differential bus. It runs from a single 3 V to 3.6 V supply, handles signaling rates up to 1 Mbps, and its high-impedance receiver allows up to 120 nodes on one bus. The RS pin gives it three personalities: full-speed edges, resistor-programmed slope control for emissions, and a 370 µA listen-only standby. A Vref pin supplies a VCC/2 reference for split termination. It ships in SOIC-8, covers −40 to 85 °C, and shuts the driver down at a 165 °C junction rather than cooking itself into a stuck bus.
Pick it when the whole node already runs on 3.3 V: it meets the same ISO 11898-2 bus levels as 5 V transceivers, with a dominant differential output above 1.5 V into the standard 60 Ω load, so it drops onto mixed 3.3 V/5 V buses without a second supply rail. What you give up is fault headroom. The bus pins survive only −4 to 16 V absolute maximum, which is thin protection for harnesses that can short to higher supply rails, and the logic pins are 3.3 V-only. It is also a design from 2001; TI's newer TCAN33x family is the usual choice for new 3.3 V nodes, leaving the SN65HVD230 as the well-documented incumbent.
Most SN65HVD230 problems are board-level, and the same five keep recurring: an RS pin left high or floating that silently disables the transmitter, slope control chosen without checking the loop-delay budget, 5 V logic wired into the 3.3 V-only D and R pins, harness faults past the 16 V bus-pin ceiling, and termination that is missing, doubled, or leaves the bus when a node is unplugged. Each is covered in the gotchas below.
What breaks boards
RS (pin 8) above 0.75 VCC silently kills the driver
A node that receives fine but never transmits is almost always an RS pin problem. RS selects the mode: a strong pull-down to ground is high-speed, a 10 kΩ to 100 kΩ resistor to ground is slope control, and anything above 0.75 VCC puts the part into 370 µA listen-only standby with the driver off. The internal biasing of a floating pin is weak, so noise can walk it into standby; TI's layout guidelines call for an external 1 kΩ to 10 kΩ resistor. If an MCU GPIO drives RS, hold it below 1.2 V whenever the node must transmit.
Slope control spends your loop-delay and bus-length budget
Slowing the driver edges for EMI raises loop delay, and at 1 Mbps loop delay is bus length. With RS grounded, t(LOOP1) is 70 ns typical; a 10 kΩ resistor (~15 V/µs slew) raises it to 105 ns, and 100 kΩ (~2 V/µs) to 535 ns typical, 920 ns max. TI's own arithmetic: at 5 ns/m counted in both directions, the 100 kΩ setting trades away 46.5 meters of cable versus high-speed mode. Pick the slope resistor with the bit-timing budget in front of you, not after the wiring is installed.
D and R are 3.3 V logic pins — 5 V tolerance is bus-side only
Interoperability with 5 V CAN happens on the bus pins, not the logic pins. Absolute maximum on D and R is −0.5 V to VCC + 0.5 V, so a 5 V TXD driving D is out of spec even though VIH is only 2 V minimum. On the bus side there is no such limit: the dominant differential output lands between 1.5 V and 3 V into the 60 Ω load ISO 11898-2 specifies, the same window 5 V transceivers must meet, so mixed-supply buses work. Mixed logic rails need a level shifter or a 5 V-tolerant transceiver.
Bus-pin fault ratings stop at −4 V and 16 V
Absolute maximum at CANH or CANL is −4 to 16 V, and ±25 V only as a transient pulse through 100 Ω. A harness short to a supply above 16 V, load dump, or inductive kick past that window is not survivable on-chip, which is why the datasheet's layout section tells you to put external transient protection (TVS) at the bus connector for industrial EFT and surge. Separately, the recommended common-mode window is −2 to 7 V; ground offset between nodes eats directly into it, so bond grounds or budget for the offset.
Terminate 120 Ω at the bus ends — and know which node owns it
ISO 11898 termination is 120 Ω at each physical end of the bus: not on every node, not on stubs. Split termination, two 60 Ω resistors with a capacitor from the center tap to ground, filters common-mode noise, and the SN65HVD230's Vref pin (VCC/2) can drive that center point; otherwise leave Vref floating. If a termination resistor lives on a node's board, unplugging that node unterminates the whole bus. Check resistor power ratings too: a supply shorted across a termination resistor pushes far more current than the transceiver's own limit.
Key specifications
| Parameter | Value | Source |
|---|---|---|
| Supply voltage | 3 V min / 3.6 V max (features: 'Operates with a single 3.3 V Supply') | SLOS346O Rev O, Section 8.3 Recommended Operating Conditions + Section 1 Features |
| Signaling rate | Designed for data rates up to 1 Mbps (signaling rate = voltage transitions per second, bps) | SLOS346O Rev O, Section 1 Features + Section 3 Description |
| Supply current | Dominant 10 mA typ / 17 mA max (VI = 0 V, no load); recessive 10 mA typ / 17 mA max (VI = VCC, no load); standby (SN65HVD230, V(Rs) = VCC) 370 uA typ / 600 uA max | SLOS346O Rev O, Section 8.5 Electrical Characteristics: Driver, ICC rows |
| Dominant differential output (VOD(D)) | 1.5 V min / 2 V typ / 3 V max (VI = 0 V, see Figure 18); 1.2 V min / 2 V typ / 3 V max (VI = 0 V, see Figure 19) | SLOS346O Rev O, Section 8.5 Electrical Characteristics: Driver |
| Bus-pin common-mode / fault voltage | Recommended common-mode voltage at any bus terminal (VIC) -2 V to 7 V; absolute maximum at any bus terminal (CANH or CANL) -4 V to 16 V; transient pulse through 100 ohm -25 V to 25 V | SLOS346O Rev O, Section 8.3 Recommended Operating Conditions + Section 8.1 Absolute Maximum Ratings |
| Total loop delay | t(LOOP1) recessive-to-dominant 70 ns typ / 115 ns max; t(LOOP2) dominant-to-recessive 100 ns typ / 135 ns max (V(Rs) = 0 V) | SLOS346O Rev O, Section 8.9 Switching Characteristics: Device |
| Operating temperature / thermal shutdown | Operating free-air temperature TA -40 to 85 C; thermal shutdown temperature 165 C with 10 C hysteresis | SLOS346O Rev O, Section 8.3 Recommended Operating Conditions |
| RS mode pin (pin 8) | Strong pull down to GND = high speed mode; 10 kohm to 100 kohm pull down to GND = slope control mode (~15 V/us slew rate with 10 kohm, ~2 V/us with 100 kohm); V(Rs) > 0.75 VCC = low-power standby (listen only, driver off); V(Rs) < 1.2 V selects the transmitting modes; internal biasing of floating pins is weak, external 1 kohm to 10 kohm resistor recommended | SLOS346O Rev O, Section 7 Pin Functions + Section 10.4 Device Functional Modes, Table 2 + Section 13.1 Layout Guidelines |
| Loop delay with slope control | t(LOOP1) 105 ns typ / 175 ns max, t(LOOP2) 155 ns typ / 185 ns max (RS = 10 kohm to ground); t(LOOP1) 535 ns typ / 920 ns max, t(LOOP2) 830 ns typ / 990 ns max (RS = 100 kohm to ground); TI example: at 5 ns/m counted in both directions, 535 ns vs 70 ns loop delay trades away 46.5 meters of bus length | SLOS346O Rev O, Section 8.9 Switching Characteristics: Device + Section 11.2.1.2 Loop Propagation Delay |
| Logic I/O levels (D, R) | VIH 2 V min, VIL 0.8 V max; absolute maximum digital input and output voltage, VI (D or R), -0.5 V to VCC + 0.5 V | SLOS346O Rev O, Section 8.3 Recommended Operating Conditions + Section 8.1 Absolute Maximum Ratings |
| Vref output / bus termination | Vref (pin 5) outputs VCC/2 (0.45 VCC min / 0.55 VCC max, -5 uA < I(Vref) < 5 uA); may drive the common-mode point of a split termination or be left floating; termination is typically 120 ohm at each end of the bus, split termination uses two 60 ohm resistors with a capacitor from the center tap to ground | SLOS346O Rev O, Section 8.10 Device Control-Pin Characteristics + Section 10.3.1 Vref Voltage Reference + Section 11.2.1.1 CAN Termination, Figure 39 |
| Bus loading (ISO 11898-2) | High input impedance allows for up to 120 nodes on a bus; differential input resistance R(Diff) 40 kohm min / 70 kohm typ / 100 kohm max; ISO 11898-2 specifies the driver differential output with a 60 ohm load (two 120 ohm termination resistors in parallel) and the differential output must be greater than 1.5 V | SLOS346O Rev O, Section 1 Features + Section 8.6 Electrical Characteristics: Receiver + Section 11.2.1.3 Bus Loading, Length and Number of Nodes |
Verified against the manufacturer datasheet on 2026-07-10. Confirm the current revision before production use.
Alternatives
- SN65HVD231: same pinout, same datasheet (SLOS346O); swaps the 230's 370 µA listen-only standby for a true sleep mode (0.04 µA typ) that shuts off both driver and receiver. The tradeoff: a sleeping 231 cannot watch the bus, so only the MCU pulling RS low can wake it.
- SN65HVD232: the bare family member on the same datasheet: no standby or sleep, no Vref, no slope control; pins 5 and 8 are NC. Fine when the node never sleeps and emissions are handled by cabling and layout instead of edge shaping.
- TCAN332: TI's newer 3.3 V CAN transceiver line (TCAN33x), the usual pick for new designs weighed as a successor; it is not covered by SLOS346O, so verify specs against its own datasheet.
Common questions
- Can the SN65HVD230 share a CAN bus with 5 V transceivers?
- Yes. Its dominant differential output is above 1.5 V and below 3 V into the 60 Ω load, the same ISO 11898-2 limits 5 V transceivers must meet, and the receiver input specifications match as well. The only bus-level difference is a slightly lower dominant common-mode output voltage, which differential receivers reject. The 3.3 V limit applies to the D and R logic pins, not the bus.
- Why does my SN65HVD230 receive but never transmit?
- Check the RS pin (pin 8). Above 0.75 VCC the part is in listen-only standby: receiver on, driver off. Ground RS for high-speed mode or use a 10 kΩ to 100 kΩ pull-down for slope control; below 1.2 V the transmitter is active. A floating RS is only weakly biased internally, so tie it with an external 1 kΩ to 10 kΩ resistor rather than leaving it open.
- What is the difference between the SN65HVD230, SN65HVD231, and SN65HVD232?
- All three share the SLOS346O datasheet and pinout. The 230 has a 370 µA listen-only standby in which the receiver keeps watching the bus. The 231 replaces standby with a 0.04 µA typ sleep mode that shuts off driver and receiver, waking only via RS. The 232 has no low-power mode, no Vref, and no slope control; pins 5 and 8 are no-connects.
- Which SN65HVD230 part number should go on a BOM?
- Use the tape-and-reel orderables: SN65HVD230DR or SN65HVD230DRG4 (2500 per reel, SOIC-8, marked VP230, −40 to 85 °C). The tube orderable SN65HVD230D is marked obsolete on ti.com even though the product itself is active, so a BOM that references the plain D suffix will hit sourcing trouble.