CH340C PCB Design Guide: Footprint, Pinout, and Alternatives
USB-to-UART bridge with internal oscillator; dominant on budget dev boards.
The CH340C is the USB-to-UART bridge on most budget development boards — the chip that replaced the FT232RL and CP2102 on cost-sensitive designs. It presents a full-speed USB 2.0-compatible device to the host and a UART running from 50 bps to 2 Mbps to your microcontroller, with the modem-control lines (DTR, RTS, and friends) needed for Arduino- and ESP32-style auto-reset circuits.
The C suffix matters: unlike the older CH340G, the CH340C has an internal oscillator and needs no external crystal, which cuts two capacitors, a crystal, and layout fuss out of the schematic. The family shares one datasheet across many suffixes (G, N, K, E, X, B, T, R) with different packages and features, so confirm which variant a reference schematic was drawn for before copying it.
CH340 designs go wrong in predictable ways: V3-pin wiring that does not match the supply voltage, logic levels mismatched to a 3.3 V target, and driver assumptions from a decade of mixed history on macOS and Windows. The details below cover each.
What breaks boards
CH340C needs no crystal — do not copy CH340G schematics blindly
The CH340C has an internal oscillator, so the XI/XO crystal circuit in older CH340G reference schematics simply does not apply. Conversely, if you substitute a CH340G into a C-designed board, it will not enumerate without its external 12 MHz crystal and load capacitors. The family's suffixes differ in exactly this kind of detail — check the datasheet's variant table before reusing any schematic.
V3 pin wiring depends on your supply voltage
At 5 V VCC (4.0–5.3 V), the V3 pin is the internal 3.3 V regulator's output and needs a 0.1 µF decoupling capacitor to ground. For 3.3 V operation, tie V3 directly to VCC and run the chip from 3.1–3.6 V. Getting this wrong — floating V3, or leaving the cap-only wiring while feeding 3.3 V — produces the classic flaky-enumeration board that works on some hosts and not others.
Driver support is good now, but history left scars
Current Windows, macOS, and Linux ship working CH340 drivers, so most users plug in and go. Older systems need WCH's driver package, and a historical third-party macOS driver was infamous for kernel panics — the source of lingering distrust of CH340 in forum posts. If you ship a product on this chip, link WCH's official drivers in your docs and note the minimum OS versions you tested.
DTR and RTS drive auto-reset and auto-program circuits
Arduino-style auto-reset uses DTR through a 100 nF series capacitor into the target's reset line; ESP32/ESP8266 auto-program circuits use the standard two-transistor network on DTR and RTS to sequence EN and GPIO0. The CH340's modem-control outputs are active-low from the host's perspective, matching what these circuits expect — but verify pin mapping against the datasheet rather than a random module drawing, since modules route these lines inconsistently.
TXD idles at VCC level — mind 3.3 V targets when running at 5 V
The UART lines swing to the chip's supply, so a CH340C at 5 V drives TXD to 5 V into your target's RX pin. For a 3.3 V microcontroller without 5 V-tolerant pins that is out of spec. Either run the CH340C in 3.3 V mode (V3 tied to VCC) so its logic matches the target, or add a divider/level shifter on TXD.
Key specifications
| Parameter | Value | Source |
|---|---|---|
| Supported baud range | 50 bps – 2 Mbps | CH340DS1 v3D, Section 2 Features |
| VCC range | 5 V mode: 4.0–5.3 V (V3 to 0.1 µF cap); 3.3 V mode: 3.1–3.6 V for CH340C (V3 tied to VCC) | CH340DS1 v3D, Sections 6.2 and 6.3 electrical parameter tables |
| I/O logic level vs V3 | VCC = 5 V: VIL max 0.9 V, VIH min 2.3 V, VOL max 0.5 V @ 6 mA, VOH min VCC − 0.6 V; VCC = V3 = 3.3 V: VIL max 0.8 V, VIH min 1.9 V, VOL max 0.5 V @ 4 mA, VOH min VCC − 0.6 V | CH340DS1 v3D, Sections 6.2 (5 V parameters) and 6.3 (3.3 V parameters) |
| USB spec | Full-speed USB device interface, compatible with USB V2.0 | CH340DS1 v3D, Section 2 Features |
| Package | SOP-16 (CH340C); family also in SOP-8, MSOP-10, SSOP-20, ESSOP-10 | CH340DS1 v3D, Section 3 Package table |
| Suspend current | CH340C: 50 µA typ / 150 µA max (VCC = 5 V); 40 µA typ (VCC = 3.3 V), in USB suspend | CH340DS1 v3D, Sections 6.2 and 6.3, ISLP rows |
Verified against the manufacturer datasheet on 2026-07-09. Confirm the current revision before production use.
Alternatives
- CP2102N — 3 Mbaud, configurable GPIOs, and best-in-class driver support across OSes; costs more.
- FT232RL — the long-time industry standard with the deepest tooling support — also the priciest and the most counterfeited USB-UART chip in existence.
- CH9102F — WCH's faster successor at up to 4 Mbaud, increasingly common on newer ESP32 dev boards.
Common questions
- What is the difference between the CH340C and CH340G?
- The CH340C has an internal oscillator; the CH340G requires an external 12 MHz crystal with load capacitors. Functionally they are otherwise the same USB-to-UART bridge from the same datasheet. Their schematics are not interchangeable — the crystal circuit is the difference.
- How do I wire the CH340 V3 pin?
- It depends on supply: at 5 V VCC, decouple V3 to ground with a 0.1 µF capacitor (it is the internal 3.3 V regulator output). For 3.3 V operation, tie V3 directly to VCC and supply 3.1–3.6 V. Wrong V3 wiring is the most common cause of intermittent enumeration.
- Does the CH340 need a driver on macOS?
- Modern macOS includes a working driver, so recent systems recognize the chip out of the box. Older versions need WCH's official driver — avoid the legacy third-party macOS driver, which was known for kernel panics and created much of the chip's bad reputation.
- Can the CH340C run at 3.3 V?
- Yes. Tie the V3 pin to VCC and power the chip from 3.1–3.6 V; its UART logic levels then match a 3.3 V target directly, which is the cleanest way to interface 3.3 V microcontrollers without level shifting.