NE555 PCB Design Guide: Footprint, Pinout, and Alternatives
Classic bipolar timer for astable and monostable circuits.
The NE555 is the bipolar 555 timer — five decades in production and still the default answer for a simple oscillator, delay, or pulse generator that must work without firmware. TI's current datasheet (SLFS022K, Rev. K) covers the commercial NE555 alongside the NA/SA/SE grades; the part runs from 4.5 to 16 V, oscillates up to about 100 kHz in astable mode, and its output can source or sink up to 200 mA — enough to drive relays, LEDs, and small loads directly.
That output muscle is the reason to pick the bipolar part over a CMOS 555, and it comes with the bipolar architecture's costs: the output stage briefly crowbars the supply on every transition, the output high level sits well below VCC, and nothing works under 4.5 V. If you need low voltage or microamp supply current instead of drive strength, the CMOS TLC555 or LMC555 is the right part — see the alternatives below.
Most 555 board problems are not the timer misbehaving; they are one of five design mistakes: skipped decoupling, assuming a rail-to-rail output, running below minimum supply, expecting a sub-50 % duty cycle from the standard astable, or a leaky or voltage-sensitive timing capacitor. Each is covered below.
What breaks boards
The bipolar output stage crowbars the supply on every transition
During output switching, both transistors of the bipolar totem-pole conduct for a moment and yank a large current spike from VCC. Without local decoupling those spikes propagate down the rail and reset neighboring logic — the classic symptom is an MCU that reboots in time with the 555's output. Put a 100 nF ceramic directly at pins 8 and 1, backed by a bulk electrolytic on the rail.
The output is not rail-to-rail: budget ~1.7 V of VOH drop
At 100 mA source current the high-level output sits about 1.7 V typical below VCC — on a 5 V supply that is 3.3 V typical, and worst-case VOH min is 2.75 V, a full 2.25 V below the rail. That matters when the 555 drives 5 V logic thresholds or a MOSFET gate that needs real enhancement. Drive logic-level gates from a higher supply, or use a CMOS 555 whose output swings to the rails.
Minimum supply is 4.5 V — below that, switch to a CMOS 555
TI's recommended operating conditions start at 4.5 V for the NE555 (the SE555 grade extends the top end to 18 V, not the bottom). On a 3.3 V rail or a 3 V coin cell the bipolar part is simply out of spec. The TLC555 and LMC555 run down to about 2 V and draw microamps — the standard substitution for battery designs.
The standard astable cannot produce a duty cycle below 50 %
In the textbook two-resistor astable the timing capacitor charges through RA + RB but discharges through RB alone, so the output high time always exceeds the low time. To get below 50 %, either bypass RB with a steering diode during charge, or take the output from a topology that uses the discharge pin (pin 7) as the output. Plan for this before committing the footprint — it adds parts.
Timing capacitor choice makes or breaks long delays; decouple pin 5
Electrolytic leakage current competes with the charging current and wrecks long RC delays; high-K ceramics (X5R/X7R and worse) lose real capacitance under DC bias and are microphonic, so timing drifts with voltage and vibration. Use C0G/NP0 or film capacitors for timing. Also decouple the CONTROL pin (pin 5) with 10 nF to ground — it sits on the internal divider, and noise there modulates the comparator thresholds directly. Note that Rev. K of the datasheet deleted the old initial-timing-error percentage spec; the remaining accuracy figures are the supply-sensitivity and tempco rows below.
Key specifications
| Parameter | Value | Source |
|---|---|---|
| Supply range | 4.5–16 V (NE555; SE555 grade allows 18 V) | SLFS022K Rev K, Section 5.3 Recommended Operating Conditions |
| Supply current | 3 mA typ / 6 mA max (VCC = 5 V, output low, no load); 10 mA typ / 15 mA max (VCC = 15 V) | SLFS022K Rev K, Section 5.5 Electrical Characteristics, supply current rows (NA555/NE555/SA555) |
| Output source/sink | up to ±200 mA (sink or source) | SLFS022K Rev K, Features + Section 5.3 (IO = ±200 mA) |
| Max astable frequency | 100 kHz (operating range < 1 mHz to 100 kHz) | SLFS022K Rev K, Section 6.1 Overview |
| Timing accuracy | Initial-error (%) spec deleted in Rev K; remaining accuracy specs: supply-voltage sensitivity 0.1 %/V typ monostable / 0.3 %/V typ astable, tempco 50 ppm/°C typ monostable / 150 ppm/°C typ astable | SLFS022K Rev K, Section 5.6 Switching Characteristics + revision history note on deleted initial-error spec |
| VOH drop | ~1.7 V typ below VCC at IOH = −100 mA (VOH typ 3.3 V at VCC = 5 V; typ 13.3 V, min 12.75 V at VCC = 15 V) | SLFS022K Rev K, Section 5.5 Electrical Characteristics, high-level output voltage rows |
Verified against the manufacturer datasheet on 2026-07-09. Confirm the current revision before production use.
Alternatives
- TLC555 — the CMOS version: runs from about 2 V, microamp supply current, no crowbar spikes — but output drive is asymmetric, sinking 100 mA typ while sourcing only ~10 mA typ (vs ±200 mA for the NE555).
- LMC555 — similar CMOS tradeoffs — low voltage and low supply current in exchange for far less output drive. Pick it or the TLC555 by availability.
- NE556 — two bipolar 555s in one package. Every caveat on this page applies twice, including the supply spikes — decouple accordingly.
Common questions
- What is the minimum supply voltage for the NE555?
- 4.5 V per TI's recommended operating conditions, with a 16 V maximum (the SE555 grade allows 18 V). Below 4.5 V the bipolar part is out of spec — use a CMOS 555 such as the TLC555, which runs down to about 2 V.
- How do I get a duty cycle below 50 % from a 555 astable?
- The standard two-resistor astable can't do it: the capacitor charges through RA + RB but discharges through RB only, so high time always exceeds low time. Add a steering diode across RB so charge and discharge take different paths, or use a topology that outputs via the discharge pin.
- What's the difference between the TLC555 and the NE555?
- The TLC555 is CMOS: it runs from about 2 V, draws microamps, and doesn't spike the supply on transitions. The tradeoff is output drive — it sinks 100 mA typ but sources only about 10 mA, where the bipolar NE555 sources or sinks up to 200 mA.
- What decoupling does an NE555 circuit need?
- A 100 nF ceramic directly across the supply pins plus bulk capacitance on the rail, because the bipolar output stage draws large current spikes on every transition. Also put 10 nF from pin 5 (CONTROL) to ground so supply noise doesn't modulate the timing thresholds.