DS1307Z+ PCB Design Guide: Footprint, Pinout, and Alternatives
5 V I²C real-time clock with battery backup and 56 bytes of SRAM
DS1307Z+ is the 8-pin SOIC orderable of Analog Devices' DS1307 real-time clock for 0°C to +70°C operation. It keeps seconds through year in binary-coded decimal, switches to a backup cell when the primary rail fails, and provides 56 bytes of battery-backed SRAM. The interface is standard-mode I²C at address 0x68.
This is an old, simple 5 V RTC, which is exactly why it still turns up in teaching boards and established designs. It needs an external 32.768 kHz crystal, firmware must start the oscillator after first power-up, and clock accuracy depends heavily on crystal loading and layout. For a new 3.3 V board, choose a 3.3 V RTC instead of running DS1307Z+ outside its primary-supply specification.
What breaks boards
This orderable needs a 5 V primary rail
DS1307Z+ specifies VCC from 4.5 V to 5.5 V. Do not power it from 3.3 V and assume a familiar I²C address makes the part electrically compatible.
The oscillator is halted after initial power application
The CH bit in the seconds register is typically set to 1 after first power-up. Firmware must clear CH to start the oscillator, then initialize the time and date registers.
Crystal choice and layout set the clock accuracy
Use a 32.768 kHz crystal specified for 12.5 pF load capacitance. Keep the crystal and X1/X2 traces away from RF and fast digital signals; coupled noise can make the clock run fast.
SDA, SCL, and SQW/OUT are open drain
SDA needs an external pullup, and SQW/OUT needs one when used. Size the I²C pullups for bus capacitance and standard-mode timing instead of relying on a breakout board's unknown resistors.
Battery mode blocks normal bus access
When VCC falls below the power-fail threshold, reads and writes are inhibited while timekeeping continues from VBAT. A system that expects to query the clock after removing VCC needs a different power arrangement.
Key specifications
| Parameter | Value | Source |
|---|---|---|
| Orderable identity | DS1307Z+; 8-pin SOIC, 150 mil; 0°C to +70°C | DS1307 Rev. 5 data sheet, Ordering Information, page 1 |
| Primary supply | 4.5 V to 5.5 V | DS1307 Rev. 5 data sheet, DC Electrical Characteristics, page 2 |
| Backup supply | 2.0 V to 3.5 V VBAT | DS1307 Rev. 5 data sheet, DC Electrical Characteristics, page 2 |
| Serial interface | I²C standard mode, 100 kHz maximum | DS1307 Rev. 5 data sheet, AC Electrical Characteristics and I²C Data Bus, pages 3 and 10 |
| I²C address | 7-bit address 1101000b (0x68) | DS1307 Rev. 5 data sheet, Slave Receiver and Slave Transmitter modes, page 11 |
| Backup current | 300 nA typical, 500 nA maximum with oscillator on and SQW/OUT off | DS1307 Rev. 5 data sheet, battery-mode DC Electrical Characteristics, page 2 |
| User memory | 56 bytes of battery-backed SRAM | DS1307 Rev. 5 data sheet, General Description and RTC and RAM Address Map, pages 1 and 7 |
| Crystal requirement | 32.768 kHz crystal with 12.5 pF load capacitance | DS1307 Rev. 5 data sheet, Pin Description and Crystal Specifications, pages 6 and 7 |
| Square-wave output | Selectable 1 Hz, 4.096 kHz, 8.192 kHz, or 32.768 kHz | DS1307 Rev. 5 data sheet, Control Register, page 9 |
| Calendar range | Leap-year compensation valid up to 2100 | DS1307 Rev. 5 data sheet, Benefits and Features, page 1 |
Verified against the manufacturer datasheet on 2026-07-10. Confirm the current revision before production use.
Alternatives
- DS1307ZN+: Industrial-temperature SOIC orderable in the same family. It extends the rated temperature range to -40°C to +85°C without changing the basic interface.
- DS1338Z-33+: Pin-compatible 3.3 V I²C RTC with 56-byte NV RAM. Supply voltage and electrical limits differ, so verify the full design before substitution.
- DS1340Z-33+: 3.3 V I²C RTC with a trickle charger and calibration features. Its register details and backup circuit require a design review rather than a blind swap.
Common questions
- Can DS1307Z+ run from 3.3 V?
- No, not within its specified primary-supply range. DS1307Z+ requires 4.5 V to 5.5 V on VCC. Its open-drain I²C pins can use pullups below 5 V if the controller's logic thresholds and the complete bus design are valid.
- Why is a new DS1307 not ticking?
- Check bit 7 of the seconds register. The CH bit is typically 1 after initial power application, which stops the oscillator. Clear it, write a valid BCD time and date, and verify the 32.768 kHz crystal and layout.
- What is the DS1307 I²C address?
- The 7-bit address is 0x68. On the wire, the seven address bits are followed by the read/write bit; do not store an already-shifted 8-bit value in software that expects a 7-bit address.
- Does DS1307Z+ need capacitors around its crystal?
- The oscillator circuit is designed for a 32.768 kHz crystal with 12.5 pF specified load capacitance and does not require external oscillator capacitors. Parasitic capacitance and PCB layout still affect accuracy.
- Can a microcontroller read DS1307Z+ while it runs from VBAT?
- No. Battery backup keeps time and SRAM alive, but normal I²C access is inhibited after VCC drops below the power-fail threshold. Restore the primary supply before reading or writing the device.
Sources
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