DRV8825 PCB design guide and datasheet

The DRV8825 is TI's workhorse bipolar stepper driver: two N-channel H-bridges, PWM current chopping, and an on-chip microstepping indexer that runs from full step down to 1/32 microstep, all controlled through a two-pin STEP/DIR interface. It takes a single 8.2 to 45 V motor supply and delivers up to 2.5 A per winding, a figure TI conditions on proper heat sinking at 24 V and 25 °C. A dedicated nSLEEP pin drops supply current to 10 µA typical, and overcurrent, overtemperature, and undervoltage protection report on an open-drain nFAULT pin. It is probably best known from the hobbyist stepper breakout boards common in 3D printers and small CNC machines.

Pick the DRV8825 over the older A4988 — the common alternative in the same role — when you want the 45 V supply ceiling or 1/32 microstepping; check Allegro's own datasheet for the A4988's limits rather than assuming parity. Pick something else when acoustics matter: this is a plain fixed-frequency chopper with three decay modes selected by a pin, it has no UART or SPI, no stall detection, and no way to reconfigure anything without touching hardware, and if quiet stepping is the goal, drivers designed for it — Trinamic's TMC2208/TMC2209, for example — are the usual place to look. Be honest about current, too: 2.5 A is a thermally conditioned maximum, not what a bare breakout with a stick-on heatsink will sustain.

The failure modes below are the ones that fill forum threads: supplies under the 8.2 V UVLO floor that make the chip play dead, PowerPAD layouts that hit thermal shutdown long before the rated current, supply transients against a 47 V absolute maximum only 2 V above the operating limit, current settings that wreck microstep accuracy near the zero crossings, and bring-up mistakes with nSLEEP timing and minimum STEP pulse widths.

What breaks boards

1. 01

   It does not run below 8.2 V, and UVLO sits exactly at the minimum supply

   The recommended motor supply starts at 8.2 V, and the undervoltage lockout threshold is 7.8 V typical but 8.2 V maximum on rising VM — worst case, UVLO releases right at the minimum operating voltage. A 5 V rail is hopeless, and a nominal supply barely above the floor that sags under motor load will trip UVLO, which disables everything and resets the internal logic, losing indexer position. Give the supply real margin above 8.2 V, and remember all VM pins must be connected to the same supply.

2. 02

   2.5 A is a heat-sinking promise: solder the PowerPAD or derate hard

   TI's 2.5 A rating is conditioned on proper heat sinking at 24 V and 25 °C. Dissipation lives in the bridge FETs — 0.2 Ω typical per FET at 25 °C, rising to 0.25 Ω typical and 0.32 Ω maximum at a junction temperature of 85 °C, so losses climb as the die heats. The 31.6 °C/W junction-to-ambient figure assumes a JEDEC high-K board with the PowerPAD soldered down; skip the pad or the via stitching to a ground plane and you hit the 160 °C typical thermal shutdown far below rated current. Shutdown auto-resumes as the die cools, so the symptom is a motor that stutters rhythmically under load.

3. 03

   45 V operating max, 47 V absolute max: almost no headroom for transients

   The absolute maximum on VM is 47 V against a 45 V operating maximum, and Rev. F added a 1 V/µs limit on supply ramp rate — very little headroom for transients. Stepper windings are inductive, so the long-standing workshop rule — a general precaution, not something the datasheet states — is to avoid connecting or disconnecting the motor while VM is applied. What the datasheet does call for: bypass VMA and VMB locally with ceramics and size the bulk capacitance for the motor's current dumps — an undersized bulk cap lets deceleration pump the rail up toward the absolute maximum.

4. 04

   Current-trip accuracy collapses at low settings: ±5% at full scale, ±25% at 5%

   Full-scale winding current is set by the xVREF pins and the sense resistors: the chopper trips when the sense voltage, amplified by the 5 V/V gain, reaches the DAC output — 660 mV typical at the sense pin with VREF at 3.3 V and the 100% setting. Keep VREF inside the recommended 1 to 3.5 V range; it operates between 0 and 1 V but accuracy is degraded, so reach low motor currents with larger sense resistors, not a tiny VREF. Even then, trip accuracy is ±5% at the 71 to 100% settings but ±25% at the 5% setting, which is why the finest microsteps near zero crossings look ragged.

5. 05

   Dead outputs at bring-up: nSLEEP and nRESET idle low, and STEP has timing floors

   The logic inputs are held low by internal pulldowns — 100 kΩ on DIR, STEP, nRESET, and MODEx, roughly 1 MΩ on nSLEEP — so floating nSLEEP or nRESET leaves the part asleep or in reset with the outputs high-impedance. Both must be driven high for operation. In firmware, respect the timing table: STEP pulses need 1.9 µs minimum high and low time (a fast MCU toggling a GPIO in a tight loop can violate this), step frequency tops out at 250 kHz, and after releasing nSLEEP the driver needs up to 1.7 ms before it accepts a STEP — pulses sent earlier are silently ignored, which means lost position.

Key specifications

Verified against the manufacturer datasheet on 2026-07-10. Confirm the current revision before production use.

Alternatives

• A4988: the older common alternative among hobbyist stepper drivers. Verify its supply, current, and microstepping limits against Allegro's own datasheet rather than assuming DRV8825 parity.
• TMC2208/TMC2209: Trinamic (Analog Devices) stepper drivers with a reputation for quiet operation; the usual place to look when DRV8825 acoustics are the complaint. Pick the DRV8825 when noise doesn't matter and simplicity does; check Trinamic's datasheets for capabilities and compatibility.
• DRV8824: TI's companion lower-current variant in the same family, aimed at smaller motors that don't need the DRV8825's full drive current; see TI's DRV8824 datasheet for its ratings.
• DRV8833: TI's low-voltage dual H-bridge. No microstepping indexer — you drive the bridges yourself — but it works from supplies far below the DRV8825's 8.2 V floor, which the DRV8825 cannot do at all.

Common questions

How do I set the winding current on a DRV8825?

With the xVREF voltage and the sense resistors. The chopper trips when the sense-resistor voltage, amplified by the internal 5 V/V gain, reaches the current DAC's output; at the 100% setting with VREF at 3.3 V the trip voltage is 660 mV typical. Keep VREF in the recommended 1 to 3.5 V range — below 1 V the part still runs but accuracy is degraded — and use larger sense resistors, not a tiny VREF, to reach low currents.

Can a 3.3 V microcontroller drive the DRV8825 directly?

Yes. The logic inputs specify VIH at 2.2 V minimum (tolerating up to 5.25 V) and VIL at 0.7 V maximum, so both 3.3 V and 5 V logic work without level shifting. Keep STEP pulses at least 1.9 µs high and low, and drive nSLEEP and nRESET high or the internal pulldowns will hold the part disabled.

Why won't my DRV8825 run from 5 V?

Undervoltage lockout. The UVLO threshold is 7.8 V typical and up to 8.2 V maximum, matching the 8.2 V minimum operating supply, so below that everything is disabled and the logic held in reset. There is no low-voltage mode; for sub-8.2 V supplies use a low-voltage driver like the DRV8833 instead.

What is the maximum step rate of the DRV8825?

250 kHz on the STEP pin, with a minimum pulse width of 1.9 µs high and low. Remember that finer microstep modes need proportionally more pulses per revolution, so 1/32 stepping eats into that budget fastest, and that after waking from sleep the driver ignores STEP edges for up to 1.7 ms.

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